LaboratoireQyrtom inc.
Large-scale quantum circuit simulation, hardware-aware compression, and experiment management.
The platform combines multiple simulation engines with a workspace for easily tracking your experiments.
Compare results, revisit your parameters, and explore your circuit distributions.
Computations run on servers located in Canada. Our goal is to host our entire infrastructure there.
BATCH COMPUTE
Batch CPU and GPU jobs, free for eligible users of the Digital Research Alliance of Canada within their allocations. Low-cost batch services are also available to non-members.
PAID SERVICE
Rented cloud CPU and GPU resources to execute circuits outside the academic batch queue.
Qyrtom has four compression engines: one for encoding to do QML, one for specific algorithms, one for efficiently extracting useful data from circuits with few samples, and one for generic circuits with no assumed constraints.
When running your circuits with Qyrtom’s system, you have the option to request possible optimizations for the circuit you submitted. When new versions of compression engines are released, you will be notified if a better result has been found for your circuit. Advanced options let you set the permitted infidelity rate, which leads to greater compression.
Multiple simulation engines, embedded tutorials, batch and on-demand compute, and experiment tracking.
Hardware-aware optimization and IBM-native exports.
Agents run simulations and compress circuits through Qyrtom’s APIs, based on your natural-language requests.
State preparation and data compression for QML circuits.
A photonic-native adapter for supported workloads.
Simulation and compression from common quantum frameworks through Qyrtom plugins.
Algorithm-specific compression and optimized output retrieval.
SVM and classification, measured against classical baselines. Quantum-tokenizer research begins.
Extensible support for user-provided gate sets and topologies.
Our research aims to develop QML models that outperform leading classical approaches on selected applications. Comparative benchmarks guide this research.
Tensor-network simulation on reconfigurable FPGA hardware.
Investigating quantum token representations for machine learning.
Dedicated chips to accelerate tensor-network contractions for quantum simulation.
Comparison of our engine with established tools: runtime, memory usage, accuracy, and cost, using reproducible circuits and conditions.
